NVSL Seminar Series

New Directions in Memory Architecture

Hongzhong Zheng
Demand is rapidly escalating for higher-performing, more energy-efficient memory and storage for applications ranging from mobile devices to the cloud. This has serious implications for the open server platform. DRAM faces a major overhaul that will demand new system architectures. Meanwhile, V-NAND, a vertical 3-D NAND flash technology, is offering both higher endurance and smaller cell sizes, in leading the way to substantive changes in system design. Furthermore, other technologies are on the horizon that together will enable a new generation of “persistent” memory devices. They will have even higher performance than today’s devices and will enable a new tier in both memory and storage architectures.
Speaker Biography: 
Hongzhong Zheng received the BS and MS degrees in electrical engineering and computer science from Huazhong University of Science and Technology, China, and the PhD degree in electrical and computer engineering from the University of Illinois at Chicago in 2009. He is currently a memory system architect at System Architecture Labs of Samsung Semiconductor Inc. He has extensive experience of novel memory system architecture with DRAM and emerging memory technologies, computer architecture and system performance modeling, energy-efficient computing system designs etc. He had more than 15 patents (including issued and pending applications), and more than 10 peer reviewed papers published in top journals and conferences. He is a member of the ACM and the IEEE.

Study of the Impact of Fast Non-Volatile Memory on Virtualized Environments

Rajesh Venkatasubramanian
The distance in cycles from the CPU to durable storage has been a key aspect in the design of software. DRAM is typically lower latency, and hence reads and writes go a lot faster than even the fast IO devices like SSDs. Applications typically read data from durable storage into volatile DRAM, process them there, and periodically deposit the results into durable storage. OSs batch IOs and commit them in asynchronous fashion. All these latency hiding techniques may see their value diminish over the coming years due to the rise in capabilities of non-volatile memories. In this talk, we will explore the opportunities and challenges exposed by fast non-volatile memory.
Speaker Biography: 
Rajesh Venkatasubramanian has been with VMware since 2005. He has led the development of several vSphere memory management features including large page support, memory compression and swap caching on SSD. He enthusiastically participates in evolution of vMotion, distributed resource scheduling (DRS) and all resource management related features. He is very excited about the opportunities exposed by fast non-volatile memory and exploring how it will impact virtualized environments. Rajesh received PhD in Computer Science and Engineering from University of Michigan.

De-virtualization in Storage Systems

Yiying Zhang
University of Wisconsin, Madison
Computer systems have become more complex over the past decades. As a result, excess virtualization can happen, where redundant levels of virtualization exist in a single system. For example, with a file system on top of a virtualized storage device, a block is first mapped from its file offset to its logical address and then from its logical address to its physical address. Excess virtualization and the indirection tables to realize layers of virtualization create both memory space and performance overhead. In this talk, I will present our approaches of de-virtualization to remove excess virtualization in storage systems. Specifically, I will talk about 1) a new I/O interface called Nameless Writes which sends only data and no address to the device; the device allocates a physical address and returns it to the file system which then stores it for future reads, 2) a hardware prototype of Nameless Writes, and 3) a lightweight tool to dynamically remove storage device virtualization by changing file system pointers to point to physical addresses; doing so requires only small OS, device, and interface changes. I will outline the challenges we met and lessons we learned in designing new interfaces and systems for de-virtualization and in implementing them with real hardware. Our results show that de-virtualization reduces flash-based SSD internal RAM space cost by 14-54 times and improves random write performance by 20 times compared to traditional SSDs. We also found that integrating new interfaces into existing systems is difficult and using a separate tool can be a good way to dynamically remove excess virtualization.
Speaker Biography: 
Yiying Zhang is a Ph.D. Candidate in the Department of Computer Sciences at the University of Wisconsin-Madison. Her advisors are Professors Andrea Arpaci-Dusseau and Remzi Arpaci-Dusseau. Her research interests are in the Operating Systems area focusing on File and Storage Systems. Before going to Madison, she received her M.S. in Computer Engineering from University of Florida and her B.S. in Computer Science from Fudan University.

Scaling the Memory Wall with Phase Change Memories

Moin Qureshi
Georgia Tech
As conventional memory technologies such as DRAM run into the scaling wall, architects and system designers are forced to look at alternative technologies for building future computer systems. Several emerging Non-Volatile Memory (NVM) technologies such as PCM, STT-RAM, and Memristors have the potential to boost memory capacity in a scalable and power-efficient manner. However, these technologies are not drop-in replacements and will require novel solutions to enable their deployment. Even the prime candidates among these technologies have their own set of challenges such as higher read latency (than DRAM), much higher write latency, and limited write endurance. In this talk, I will discuss some of our recent work that addresses these challenges. Our solutions include: hybrid memory systems, start-gap wear leveling, online attack detection, and efficient error correction. These solutions are applicable to a wide variety of emerging NVM technologies, and lay the groundwork for enabling their adoption in a broad spectrum of computer systems.
Speaker Biography: 
Dr. Moinuddin Qureshi joined the faculty of the Georgia Institute of Technology as an Associate Professor in August 2011. His research interests include computer architecture, scalable memory systems, fault tolerant computing, and analytical modeling of computer systems. He worked as a research staff member at IBM T.J. Watson Research Center from 2007 to 2011. While at IBM, he contributed to the design of efficient caching algorithms for Power 7 processors. He was awarded the IBM outstanding technical achievement award for his studies on emerging memory technologies for server processors. He received his Ph.D. (2007) and M.S. (2003), both in Electrical Engineering from the University of Texas at Austin, and his Bachelor of Electronics Engineering (2000) degree from University of Mumbai.